Bold Approach Could Change Electronics Industry

Professors receive $1.5 million to study new idea that could drastically reduce power consumption and increase speed in the next generation of computers

Alex Balandin, a professor of electrical engineering and chair of the materials science and engineering program

RIVERSIDE, Calif. (—Two professors from the University of California, Riverside’s Bourns College of Engineering have received $1.5 million to study a new approach that could allow the electronics industry to drastically reduce power consumption and increase speed in the next generation of computers.

Alexander Balandin, a professor of electrical engineering and chair of the materials science and engineering program, and Roger Lake, a professor of electrical engineering, will work with John Stickney, a professor of chemistry at the University of Georgia. Balandin serves as a principal investigator for the overall project, coordinating experimental research in his laboratory with computational studies in Lake’s group and materials growth activities in Stickney’s group.

The money is awarded under the nation-wide Nanoelectronics for 2020 and Beyond competition. The researchers will receive $1.3 million in funding from the National Science Foundation and $200,000, as a gift, from the Nanoelectronics Research Initiative of the Semiconductor Research Corporation, a technology research consortium whose members include Intel, IBM and other high-tech leaders.

For 50 years, electronics have run on silicon transistor technology. Over those years, that technology has continually been scaled down to the point now further shrinkage is difficult. Continuing evolution of electronics beyond the limits of the conventional silicon technology requires innovative approaches for solving heat dissipation, speed and scaling issues.

Balandin and Lake believe they have found that innovative approach.

They plan to encode information not with conventional electrical currents, individual charges or spins but with the collective states formed by the charge-density waves.

Charge-density waves, also known as CDWs, are modulations in the electron density and associated modulations of the atom positions in crystal lattices of certain materials. They were known for almost a century but until today have not been considered for applications in computing. The use of collective states, or waves, instead of electrical currents of individual electrons can help to reduce the amount of power needed per computation.

“The idea of using charge-density waves for information processing is a bold one and presents an absolutely new approach for solving the scaling and heat dissipation problems in electronics,” said Balandin, who received this year’s Pioneer of Nanotechnology Award from the IEEE Nanotechnology Council.

The research to be carried out at UC Riverside will complement conventional silicon transistor technology. The charge-density wave materials can be integrated with silicon and other materials used in conventional computers. The prototype devices, which use the charge-density waves, have already been built in Balandin’s Nano-Device Laboratory.

The phase, frequency and amplitude of the collective current of the interfering charge waves will encode information and allow for massive parallelism in information processing. The low-dissipation, massively parallel information processing with the collective state variables can satisfy the computational, communication, and sensor technology requirements for decades to come.

The paradigm proposed by Balandin and Lake has never been attempted before. Its major benefit is that it can be implemented at room temperature and does not require magnetic fields like other computational schemes do.

The project will lead to better understanding of the material properties and physical processes of charge-density wave materials in highly-scaled, low-dimension regimes that have not yet been explored. Among the outcomes of this research will be optimized device designs for exploiting charge-density waves for computations and understanding the fundamental limits of the performance metrics.

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